| s2rwu | Embedder.Builtins |
| s2tb | Embedder.Builtins |
| sanitizeComment | |
| 1 (Function) | ReWire.Verilog.Syntax |
| 2 (Function) | ReWire.VHDL.Syntax |
| SAssign | ReWire.VHDL.Syntax |
| scJoins | ReWire.Eidos.Parse |
| Scope | |
| 1 (Type/Class) | ReWire.Eidos.Parse |
| 2 (Data Constructor) | ReWire.Eidos.Parse |
| scTVs | ReWire.Eidos.Parse |
| sDeclHead | ReWire.HSE.Exports |
| secondTerm | Embedder.Isabelle.Syntax |
| seedNames | ReWire.Hyle.Mangle |
| SelAssign | ReWire.VHDL.Syntax |
| selfGroup | Embedder.Isabelle.Syntax |
| semi | |
| 1 (Function) | ReWire.Pretty |
| 2 (Function) | ReWire.Eidos.Lexer |
| Sensitivity | ReWire.Verilog.Syntax |
| Seq | |
| 1 (Data Constructor) | ReWire.Hyle.Syntax |
| 2 (Data Constructor) | Embedder.Builtins |
| SeqAssign | ReWire.Verilog.Syntax |
| SeqI | Embedder.Builtins |
| SeqLit | ReWire.Cryptol.Syntax |
| SeqR | Embedder.Builtins |
| SeqRInf | Embedder.Builtins |
| SeqS | Embedder.Builtins |
| SeqStmt | ReWire.VHDL.Syntax |
| setCtors | ReWire.HSE.Rename |
| setTyAnn | Embedder.Atmo.Types |
| SExt | ReWire.Hyle.Syntax |
| sext | ReWire.Bits |
| SFinish | ReWire.VHDL.Syntax |
| SGe | ReWire.Hyle.Syntax |
| SGt | ReWire.Hyle.Syntax |
| shiftAmount' | ReWire.BitWord |
| shiftL' | ReWire.BitWord |
| shiftL1' | ReWire.BitWord |
| shiftR' | ReWire.BitWord |
| shiftR1' | ReWire.BitWord |
| Shl | ReWire.Hyle.Syntax |
| showb | ReWire.Pretty |
| ShowBin | ReWire.Interactive |
| showbPrec | ReWire.Pretty |
| ShowDec | ReWire.Interactive |
| ShowHex | ReWire.Interactive |
| showHex | ReWire.BitVector |
| showHex' | ReWire.BitVector |
| showt | ReWire.Pretty |
| SIf | ReWire.VHDL.Syntax |
| Sig | |
| 1 (Type/Class) | ReWire.Hyle.Syntax |
| 2 (Data Constructor) | ReWire.Hyle.Syntax |
| 3 (Type/Class) | ReWire.Eidos.Syntax, ReWire.Synolon.Syntax |
| 4 (Data Constructor) | ReWire.Eidos.Syntax, ReWire.Synolon.Syntax |
| sig | Embedder.Atmo.Types |
| SigComment | ReWire.VHDL.Syntax |
| Signal | |
| 1 (Type/Class) | ReWire.Verilog.Syntax |
| 2 (Type/Class) | ReWire.VHDL.Syntax |
| 3 (Data Constructor) | ReWire.VHDL.Syntax |
| 4 (Data Constructor) | Embedder.Builtins, ReWire.Builtins |
| signal | ReWire |
| sigName | ReWire.Verilog.Syntax |
| Signed | ReWire.Verilog.Syntax |
| sigP | ReWire.Eidos.Parse |
| sigTVs | ReWire.Eidos.Syntax, ReWire.Synolon.Syntax |
| sigTy | ReWire.Eidos.Syntax, ReWire.Synolon.Syntax |
| simplify | ReWire.Eidos.Simplify |
| SimpT | ReWire.Eidos.Simplify |
| Sing | ReWire.Cryptol.Syntax |
| singleton | ReWire.Vectors |
| SInstIn | ReWire.Hyle.Syntax |
| Size | |
| 1 (Type/Class) | ReWire.Cryptol.Syntax |
| 2 (Type/Class) | ReWire.Verilog.Syntax |
| 3 (Type/Class) | ReWire.Hyle.Syntax |
| 4 (Type/Class) | ReWire.VHDL.Syntax |
| size | ReWire.BitVector |
| SizeAnnotated | ReWire.Hyle.Syntax |
| sizeOf | |
| 1 (Function) | ReWire.Hyle.Syntax |
| 2 (Function) | ReWire.Synolon.Repr |
| sizeOfM | ReWire.Synolon.Repr |
| Sizes | ReWire.Synolon.Repr |
| SLe | ReWire.Hyle.Syntax |
| SLet | ReWire.Hyle.Syntax |
| Slice | |
| 1 (Data Constructor) | ReWire.Hyle.Syntax |
| 2 (Data Constructor) | ReWire.VHDL.Syntax |
| slice | |
| 1 (Function) | ReWire.Cryptol.Syntax |
| 2 (Function) | ReWire.Vectors |
| SLt | ReWire.Hyle.Syntax |
| snd | ReWire.Prelude |
| SNext | ReWire.Hyle.Syntax |
| snoc | ReWire.Vectors |
| softline | ReWire.Pretty |
| sortFreeProgram | Embedder.Atmo.DependencyGraph |
| source | ReWire.Config, Embedder.Config |
| SOutput | ReWire.Hyle.Syntax |
| space | |
| 1 (Function) | ReWire.Pretty |
| 2 (Function) | ReWire.Eidos.Lexer |
| Span | |
| 1 (Type/Class) | ReWire.Annotation |
| 2 (Data Constructor) | ReWire.Annotation |
| spanAnnote | ReWire.GHC.Recognize |
| spanEnd | ReWire.Annotation |
| spanFile | ReWire.Annotation |
| spanStart | ReWire.Annotation |
| specialize | ReWire.Eidos.Spec |
| SpecOrigin | |
| 1 (Type/Class) | ReWire.Eidos.Syntax, ReWire.Synolon.Syntax |
| 2 (Data Constructor) | ReWire.Eidos.Syntax, ReWire.Synolon.Syntax |
| splitStart | ReWire.GHC.Recognize |
| squote | ReWire.Pretty |
| srcAnnote | ReWire.Annotation |
| stableNames | ReWire.Config, Embedder.Config |
| start | ReWire.Config, Embedder.Config |
| StateDev | ReWire.Monad |
| stateSigs | ReWire.Config, Embedder.Config |
| StateT | RWC.Primitives, ReWire |
| step | ReWire.Interactive |
| stepPure | ReWire.Interactive |
| Stmt | |
| 1 (Type/Class) | ReWire.Verilog.Syntax |
| 2 (Type/Class) | ReWire.Hyle.Syntax |
| 3 (Type/Class) | ReWire.VHDL.Syntax |
| stringLit | ReWire.Eidos.Lexer |
| stripFreshTag | ReWire.Hyle.Mangle |
| strTy | Embedder.Atmo.Types |
| Sub | |
| 1 (Data Constructor) | ReWire.Verilog.Syntax |
| 2 (Data Constructor) | ReWire.Hyle.Syntax |
| 3 (Data Constructor) | Embedder.Builtins, ReWire.Builtins |
| subRange | ReWire.Hyle.Interp |
| substTv | ReWire.Eidos.Types |
| substVars | ReWire.Eidos.Subst |
| substVarsRefreshing | ReWire.Eidos.Subst |
| svReserved | ReWire.Hyle.Mangle |
| SWait | ReWire.VHDL.Syntax |
| SWriteLn | ReWire.VHDL.Syntax |
| symbol | ReWire.Eidos.Lexer |
| Synchronous | ReWire.Config, Embedder.Config |
| synolon | ReWire.Config, Embedder.Config |
| synolonFile | ReWire.Config, Embedder.Config |
| synolonToHyle | ReWire.Synolon.ToHyle |
| SyntaxErrorT | ReWire.Error |
| synthable | ReWire.Eidos.Types |
| Synthesized | ReWire.Annotation |
| synthTy | ReWire.Eidos.Parse |
| szBitRep | ReWire.BitVector |