rewire-base-2.8: A Haskell-to-Verilog/VHDL compiler, shared base utilities
Contents
Index
Index
$$
ReWire.Pretty
<+>
ReWire.Pretty
<<.
ReWire.BitVector
<>
ReWire.Pretty
==.
ReWire.BitVector
>>.
ReWire.BitVector
@.
ReWire.BitVector
@@
ReWire.BitVector
align
ReWire.Pretty
angles
ReWire.Pretty
ann
ReWire.Annotation
annContext
ReWire.Annotation
Annotated
ReWire.Annotation
Annotation
ReWire.Annotation
Annote
1 (Type/Class)
ReWire.Annotation
2 (Data Constructor)
ReWire.Annotation
annProv
ReWire.Annotation
ashr
ReWire.BitVector
AstError
ReWire.Error
bitVec
ReWire.BitVector
Blind
1 (Type/Class)
ReWire.Annotation
2 (Data Constructor)
ReWire.Annotation
boundedFix
ReWire.Fix
boundedFixOn
ReWire.Fix
braced
ReWire.Pretty
braces
ReWire.Pretty
brackets
ReWire.Pretty
BV
ReWire.BitVector
Certify
ReWire.Config
certify
ReWire.Config
CertifyOff
ReWire.Config
CertifyRequired
ReWire.Config
CertifyWarn
ReWire.Config
clock
ReWire.Config
colon
ReWire.Pretty
comma
ReWire.Pretty
concat
ReWire.BitVector
Config
ReWire.Config
Cryptol
ReWire.Config
cycles
ReWire.Config
debugLint
ReWire.Config
defaultInputsFile
ReWire.Config
defaultLayoutOptions
ReWire.Pretty
depth
ReWire.Config
Doc
ReWire.Pretty
dot
ReWire.Pretty
dquote
ReWire.Pretty
dquotes
ReWire.Pretty
dump
ReWire.Config
eidos
ReWire.Config
eidosFile
ReWire.Config
empty
ReWire.Pretty
failAt
ReWire.Error
failAt'
ReWire.Error
failAtWith
ReWire.Error
failInternal
ReWire.Error
failNowhere
ReWire.Error
fastPrint
ReWire.Pretty
fastPrint'
ReWire.Pretty
filePath
ReWire.Error
fix
ReWire.Fix
fix'
ReWire.Fix
fixOn
ReWire.Fix
fixOn'
ReWire.Fix
fixPure
ReWire.Fix
fixUntil
ReWire.Fix
Flag
ReWire.Flags
FlagCertify
ReWire.Flags
FlagClockName
ReWire.Flags
FlagCore
ReWire.Flags
FlagCryptol
ReWire.Flags
FlagCycles
ReWire.Flags
FlagDebugLint
ReWire.Flags
FlagDump
ReWire.Flags
FlagDumpAll
ReWire.Flags
FlagEidos
ReWire.Flags
FlagEvalDepth
ReWire.Flags
FlagFlatten
ReWire.Flags
FlagFromCore
ReWire.Flags
FlagHelp
ReWire.Flags
FlagInputNames
ReWire.Flags
FlagInterpret
ReWire.Flags
FlagInvertReset
ReWire.Flags
FlagLoadPath
ReWire.Flags
FlagLocators
ReWire.Flags
FlagNoClock
ReWire.Flags
FlagNoHalt
ReWire.Flags
FlagNoLocators
ReWire.Flags
FlagNoReset
ReWire.Flags
FlagNoWarn
ReWire.Flags
FlagO
ReWire.Flags
FlagOutputNames
ReWire.Flags
FlagPretty
ReWire.Flags
FlagResetName
ReWire.Flags
FlagRtlOpt
ReWire.Flags
FlagStableNames
ReWire.Flags
FlagStart
ReWire.Flags
FlagStateNames
ReWire.Flags
FlagSyncReset
ReWire.Flags
FlagSynolon
ReWire.Flags
FlagTestbench
ReWire.Flags
FlagTop
ReWire.Flags
FlagVerbose
ReWire.Flags
FlagVerilog
ReWire.Flags
FlagVhdl
ReWire.Flags
FlagVhdlPkgs
ReWire.Flags
FlagW
ReWire.Flags
Flatten
ReWire.Config
flatten
ReWire.Config
FromGeneric
1 (Type/Class)
ReWire.Pretty
2 (Data Constructor)
ReWire.Pretty
fromGeneric
ReWire.Pretty
FromSource
ReWire.Annotation
fromString
ReWire.Pretty
fromText
ReWire.Pretty
genericShowbPrec
ReWire.Pretty
getOutFile
ReWire.Config
gmapT
ReWire.SYB
hashHex
ReWire.Sha256
Haskell
ReWire.Config
hcat
ReWire.Pretty
hsep
ReWire.Pretty
inputsFile
ReWire.Config
inputSigs
ReWire.Config
int
ReWire.Pretty
Interpret
ReWire.Config
interpret
ReWire.Config
Inverted
ReWire.Config
Label
ReWire.Error
Language
ReWire.Config
layoutSmart
ReWire.Pretty
line
ReWire.Pretty
loadPath
ReWire.Config
locators
ReWire.Config
lsb1
ReWire.BitVector
mark
ReWire.Error
MonadError
ReWire.Error
MsgAnnote
ReWire.Annotation
nat
ReWire.BitVector
nbits
ReWire.BitVector
nest
ReWire.Pretty
nil
ReWire.BitVector
noAnn
ReWire.Annotation
NoAnnote
ReWire.Annotation
noHalt
ReWire.Config
noLocators
ReWire.Config
NoProvenance
ReWire.Annotation
noWarn
ReWire.Config
ones
ReWire.BitVector
outFile
ReWire.Config
OutFlag
ReWire.Config
outFlags
ReWire.Config
outputSigs
ReWire.Config
parens
ReWire.Pretty
pDebug
ReWire.Config
Pretty
1 (Type/Class)
ReWire.Pretty
2 (Data Constructor)
ReWire.Config
pretty
1 (Function)
ReWire.Pretty
2 (Function)
ReWire.Config
prettyPrint
ReWire.Pretty
prettyPrint'
ReWire.Pretty
primSpan
ReWire.Annotation
printError
ReWire.Error
Provenance
ReWire.Annotation
punctuate
ReWire.Pretty
PutMsg
ReWire.Error
putMsg
ReWire.Error
query
ReWire.SYB
queryWith
ReWire.SYB
relocateErr
ReWire.Error
relocatingNoLocTo
ReWire.Error
relocatingTo
ReWire.Error
renderStrict
ReWire.Pretty
replicate
ReWire.BitVector
reset
ReWire.Config
ResetFlag
ReWire.Config
resetFlags
ReWire.Config
rtlOpt
ReWire.Config
runSyntaxError
ReWire.Error
RWCore
ReWire.Config
semi
ReWire.Pretty
showb
ReWire.Pretty
showbPrec
ReWire.Pretty
showHex
ReWire.BitVector
showHex'
ReWire.BitVector
showt
ReWire.Pretty
size
ReWire.BitVector
softline
ReWire.Pretty
source
ReWire.Config
space
ReWire.Pretty
Span
1 (Type/Class)
ReWire.Annotation
2 (Data Constructor)
ReWire.Annotation
spanEnd
ReWire.Annotation
spanFile
ReWire.Annotation
spanStart
ReWire.Annotation
squote
ReWire.Pretty
srcAnnote
ReWire.Annotation
stableNames
ReWire.Config
start
ReWire.Config
stateSigs
ReWire.Config
Synchronous
ReWire.Config
synolon
ReWire.Config
synolonFile
ReWire.Config
SyntaxErrorT
ReWire.Error
Synthesized
ReWire.Annotation
szBitRep
ReWire.BitVector
T
ReWire.SYB
target
ReWire.Config
testbench
ReWire.Config
text
ReWire.Pretty
TextShow
ReWire.Pretty
TId
ReWire.SYB
TM
ReWire.SYB
toAnnote
ReWire.Annotation
top
ReWire.Config
Tr
ReWire.SYB
transform
ReWire.SYB
transformM
ReWire.SYB
transformTr
ReWire.SYB
tupled
ReWire.Pretty
unAnn
ReWire.Annotation
unBlind
ReWire.Annotation
Verbose
ReWire.Config
verbose
ReWire.Config
Verilog
ReWire.Config
VHDL
ReWire.Config
vhdlPackages
ReWire.Config
vsep
ReWire.Pretty
warnAt
ReWire.Error
Warning
1 (Type/Class)
ReWire.Error
2 (Data Constructor)
ReWire.Error
wError
ReWire.Config
width
ReWire.BitVector
zeros
ReWire.BitVector