rewire-frontend-2.8: A Haskell-to-Verilog/VHDL compiler, front end (GHC driver, Eidos, Synolon)
Safe HaskellSafe
LanguageHaskell2010

ReWire.Synolon.Parse

Description

Parser for the Synolon concrete syntax (.syn; doc/synolon.md sections 3.4 and 9): the process declarations, and the program that embeds Eidos datatypes and definitions (parsed and elaborated by ReWire.Eidos.Parse, as are the expressions inside blocks). ReWire.Synolon.Pretty is the other half of the round-trip contract.

Terminator labels resolve after the whole process is parsed (a terminator may target a block declared later); a label's signature is arrows from its block's parameter types to the process output type (a bookkeeping convention — labels are not values). Expressions inside processes parse in the monomorphic, join-free scope.

Documentation